From real-time emulation to ASIC integration for image processing applications

Author

Kraljic, Ivan C. ; Quenot, M. ; Zavidovique, Bertrand

Author_Institution

Lab. Syst. de Perception, Arcueil, France

fYear

1995

fDate

18-22 Sep 1995

Firstpage

31

Lastpage

34

Abstract

A methodology for deriving image processing ASICs from the results of their real-time emulation on the Data-Flow Functional Computer is presented. The aim of the method is to reduce the time and effort required for synthesizing and validating ASICs after emulation. This is achieved by optimizing the architecture validated on the emulator and integrating the optimized resources. The results of the derivation of a defect detector are presented

Keywords

application specific integrated circuits; circuit CAD; circuit optimisation; data flow computing; image processing; integrated circuit design; real-time systems; ASIC integration; architecture; data-flow functional computer; defect detector; image processing; optimization; real-time emulation; synthesis; validation; Application specific integrated circuits; Automatic logic units; Databases; Design automation; Design optimization; Detectors; Dissolved gas analysis; Emulation; Image processing; Integrated circuit synthesis;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC Conference and Exhibit, 1995., Proceedings of the Eighth Annual IEEE International

Conference_Location

Austin, TX

ISSN

1063-0988

Print_ISBN

0-7803-2707-1

Type

conf

DOI

10.1109/ASIC.1995.580675

Filename

580675