Control structure of a 4×4 by 40 Gbit/sec ATM switch

Author

Butner, steven E.

Author_Institution

Dept. of Electr. & Comput. Eng., California Univ., Santa Barbara, CA, USA

fYear

1996

fDate

27-29 Mar 1996

Firstpage

201

Lastpage

205

Abstract

This paper discusses the control architecture of a very high performance 4-input, 4-output asynchronous transfer mode (ATM) switch that has been designed as part of the ARPA-sponsored “Thunder and Lightning” project at the University of California, Santa Barbara. This research project is focused on the design and prototype demonstration of ATM links and switches operating at or above 40 gigabits per second per link (TDM), with potential scalability to 100 Gbit/sec. Such aggressive link rates place severe requirements on the switch architecture, particularly the buffering scheme. We discuss the control paths and techniques used in this ATM switch and describe reasons for the main design choices

Keywords

asynchronous transfer mode; buffer storage; electronic switching systems; optical fibre networks; telecommunication control; telecommunication links; 100 Gbit/s; 40 Gbit/s; ATM links; ATM switch; Santa Barbara; TDM; Thunder and Lightning project; University of California; asynchronous transfer mode; buffering scheme; control architecture; link rates; prototype demonstration; research project; switch architecture; switch design; Asynchronous transfer mode; Bandwidth; Communication switching; Computer architecture; Hardware; Packet switching; Prototypes; Routing; Switches; Time division multiplexing;

fLanguage

English

Publisher

ieee

Conference_Titel

Computers and Communications, 1996., Conference Proceedings of the 1996 IEEE Fifteenth Annual International Phoenix Conference on

Conference_Location

Scottsdale, AZ

Print_ISBN

0-7803-3255-5

Type

conf

DOI

10.1109/PCCC.1996.493634

Filename

493634