Title :
VHDL macro library testing using BOAR emulation tool
Author :
Hakkarainen, Harri ; Isoaho, Jouni
Author_Institution :
Signal Process. Lab., Tampere Univ. of Technol., Finland
Abstract :
In this paper, the testing of DSP and telecommunication macro library with an FPGA based emulation platform is introduced. The BOAR emulation system is targeted for animating accurately the modern ASIC and processor based systems, which make it also an efficient tool for validating the VHDL based macro components. By utilizing the emulator as a part of an ASIC design process, the testing time of the macros is reduced from several months to a few days, providing also huge savings in ASIC development costs and time
Keywords :
application specific integrated circuits; automatic testing; field programmable gate arrays; hardware description languages; integrated circuit design; integrated circuit testing; ASIC design process; BOAR emulation tool; FPGA based emulation platform; VHDL macro library testing; Animation; Application specific integrated circuits; Digital signal processing; Emulation; Hardware; Process design; Prototypes; Software libraries; System testing; Telecommunications;
Conference_Titel :
ASIC Conference and Exhibit, 1995., Proceedings of the Eighth Annual IEEE International
Conference_Location :
Austin, TX
Print_ISBN :
0-7803-2707-1
DOI :
10.1109/ASIC.1995.580692
