A multichip module based RISC processor with programmable hardware

Author

Newell, Michael ; Fang, Wai-Chi ; Johannesson, Richard ; Alkalai, Leon

Author_Institution

Jet Propulsion Lab., California Inst. of Technol., Pasadena, CA, USA

fYear

1995

fDate

18-22 Sep 1995

Firstpage

119

Lastpage

122

Abstract

A multichip module (MCM) based RISC processor with programmable hardware has been developed for the new era of miniaturized spacecraft required for NASA´s “faster, better, cheaper” missions. The MCM based processor incorporates a complete 32-bit RISC computer including RAM, EEPROM and programmable hardware. This paper describes the system architecture and its associated MCM design and implementation. It also explores the architectural merits of including user programmable hardware

Keywords

aerospace computing; microprocessor chips; multichip modules; reduced instruction set computing; space vehicle electronics; special purpose computers; 32 bit; EEPROM; MCM based RISC processor; NASA missions; RAM; miniaturized spacecraft applications; multichip module; programmable hardware; system architecture; Computer architecture; Control systems; EPROM; Hardware; Multichip modules; Protocols; Read-write memory; Reduced instruction set computing; Space technology; Space vehicles;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC Conference and Exhibit, 1995., Proceedings of the Eighth Annual IEEE International

Conference_Location

Austin, TX

ISSN

1063-0988

Print_ISBN

0-7803-2707-1

Type

conf

DOI

10.1109/ASIC.1995.580695

Filename

580695