DocumentCode
3413248
Title
Simultaneously formed storage node contact and metal contact cell (SSMC) for 1 Gb DRAM and beyond
Author
Lee, J.Y. ; Kim, K.N. ; Shin, Y.C. ; Lee, K.H. ; Kim, J.S. ; Kim, D.H. ; Park, J.W. ; Lee, J.G.
Author_Institution
Technol. Dev., Samsung Electron. Co., Kiheung-Eup, South Korea
fYear
1996
fDate
8-11 Dec. 1996
Firstpage
593
Lastpage
596
Abstract
Simultaneously formed Storage node contact and Metal contact Cell (SSMC) was investigated and developed with 0.18 /spl mu/m advanced KrF lithography as a promising candidate for the cell structure of 1 Gb DRAM and beyond, such as 4 Gb and 16 Gb DRAMs. SSMC can provide fast and reliable memory cell operation by reducing parasitic resistance between memory cell storage node and access transistor. Also SSMC can reduce the processing steps compared to the conventional COB (Capacitor Over Bit line) cell by forming storage node contact holes and metal contact hole at the same time. Furthermore, it is found that SSMC has many other advantages in terms of process margin, and wide application, for example in EML (embedded memory logic). Thus, SSMC is a promising cell structure for 1 Gb DRAM and beyond.
Keywords
DRAM chips; MOS memory circuits; integrated circuit metallisation; photolithography; 0.18 micron; 1 to 16 Gbit; Gbit DRAM; KrF; KrF lithography; Ta/sub 2/O/sub 5/; contact hole formation; embedded memory logic; parasitic resistance; process margin; storage node contact/metal contact cell; Binary search trees; Contact resistance; Dielectrics; Etching; Fabrication; Isolation technology; Lithography; Random access memory; Technological innovation; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1996. IEDM '96., International
Conference_Location
San Francisco, CA, USA
ISSN
0163-1918
Print_ISBN
0-7803-3393-4
Type
conf
DOI
10.1109/IEDM.1996.554053
Filename
554053
Link To Document