DocumentCode :
3414107
Title :
An efficient technique of instruction scheduling on a superscalar-based multiprocessor
Author :
Hwang, Rong-Yuh
Author_Institution :
Dept. of Electron. Eng., Nat. Taiwan Inst. of Technol., Taipei, Taiwan
fYear :
1997
fDate :
1-5 Apr 1997
Firstpage :
33
Lastpage :
38
Abstract :
An instruction scheduling approach is proposed for performance enhancement on a superscalar-based multiprocessor. The traditional list scheduling approach is not suitable for the environment because it does not consider the effect of synchronization operation. According to the LED loop theorem, the system performance is very concerned with the position of synchronization operation. Therefore, the scheduling of synchronization operation has the highest priority in this technique. There are two aspects of performance enhancement for the instruction scheduling approach: (1) converting LED into LFD, and (2) reducing the damage of LED. Experimental results show that the enhancement is significant
Keywords :
multiprocessing systems; parallel architectures; performance evaluation; processor scheduling; synchronisation; LED loop theorem; instruction scheduling; performance enhancement; superscalar-based multiprocessor; synchronization; Computer architecture; Councils; Displays; Electronic mail; Hardware; Process design; Processor scheduling; System performance;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel Processing Symposium, 1997. Proceedings., 11th International
Conference_Location :
Genva
ISSN :
1063-7133
Print_ISBN :
0-8186-7793-7
Type :
conf
DOI :
10.1109/IPPS.1997.580840
Filename :
580840
Link To Document :
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