DocumentCode
341429
Title
A CMOS 10 b 60 Msample/s ADC with ultra fast gain control
Author
Bacrania, Kantilal ; Shu, Tzi-Hsiung
Author_Institution
Harris Semicond., Melbourne, FL, USA
Volume
1
fYear
1999
fDate
36342
Firstpage
55
Abstract
A 10-bit 60 Msample/s CMOS analog-to-digital converter (ADC) aimed at high-order system integration applications has been designed and fabricated. It features a single 5 V design, an internal sample-and-hold with gain programmable from 0 to 24 dB in 6 dB steps and has a full-power bandwidth (FPBW) of >250 MHz. The stand-alone version of the converter dissipates 400 mW of power
Keywords
CMOS integrated circuits; analogue-digital conversion; gain control; 0 to 24 dB; 10 bit; 250 MHz; 400 mW; 5 V; CMOS ADC; CMOS analog-to-digital converter; high-order system integration applications; internal sample/hold; programmable gain; ultra fast gain control; Analog-digital conversion; Bandwidth; Circuits; Digital signal processing; Energy consumption; Gain control; Operational amplifiers; Samarium; Signal design; System performance;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1999. ISCAS '99. Proceedings of the 1999 IEEE International Symposium on
Conference_Location
Orlando, FL
Print_ISBN
0-7803-5471-0
Type
conf
DOI
10.1109/ISCAS.1999.777804
Filename
777804
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