• DocumentCode
    3414568
  • Title

    A 600 MHz DSP with 24 Mb embedded DRAM with an enhanced instruction set for wireless communication

  • Author

    Greenfield, Z. ; Holzer, R. ; Kadry, Amina ; Kraus, Erik ; Lange, Friedrich ; Olofsson, A. ; Treves, David ; Zur, Sarit

  • fYear
    2004
  • fDate
    15-19 Feb. 2004
  • Firstpage
    418
  • Abstract
    A 600 MHz general-purpose DSP with 24 Mb of embedded DRAM, 154 GOPS, 4800 MMACS, and 40 Gb/s I/O throughput is presented. The chip contains over 60M transistors and is implemented in 0.13 μm 8M CMOS technology.
  • Keywords
    CMOS integrated circuits; DRAM chips; digital signal processing chips; instruction sets; mobile radio; 0.13 micron; 24 Mbit; 40 Gbit/s; 600 MHz; CMOS technology; I/O throughput; embedded DRAM; enhanced instruction set; general-purpose DSP; wireless communication; Application software; CMOS technology; Delay; Digital signal processing; Logic; Random access memory; Signal processing; Throughput; Viterbi algorithm; Wireless communication;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 2004. Digest of Technical Papers. ISSCC. 2004 IEEE International
  • ISSN
    0193-6530
  • Print_ISBN
    0-7803-8267-6
  • Type

    conf

  • DOI
    10.1109/ISSCC.2004.1332772
  • Filename
    1332772
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3414568