Finite state machine partitioning for low power

Clock-gating is an effective approach to reduce power consumption of finite state machines (FSMs) which have plenty of self-loop events. To effectively apply the clock gating technique, the occurrence probability of self-loops in a FSM has to be maximized. In this paper we present a technique based on output partitioning to decompose a FSM into interactive sub-FSMs to increase the self-loop probability of each sub-FSM which in turn reduces the power consumption. Experimental results show that significant increase of the self-loop probability is achieved and power consumption is reduced with a moderate area overhead