Optoelectronic integrated receiver for inter-MCM and inter-chip optical interconnects

We present the integration of an ultra-sensitive III-V detector for digital optical signals with a novel comparator amplifier silicon circuit. The III-V detector is based on a differential pair of optical thyristors. It has at present a total area of 160/spl times/200 /spl mu/m/sup 2/, it operates at up to 155 Mbit/s and it requires optical inputs of 3 femtojoule at 830 nm. Its combination with the proposed silicon amplifier circuit results in a unique optoelectronic receiver ideally suited for inter-chip interconnects: it is extremely sensitive to input light, which allows to use less efficient yet reliable and cost-effective light sources (possibly LEDs); its speed is comparable to on-chip clock speed, appealing for inter-chip and inter-MCM interconnects; its low power dissipation and small size are features which permit massively parallel integration of the OEIR to achieve a huge aggregate bandwidth.