FPGA-based implementation of segmented predistorters for RF power amplifiers

Current communication standards, such as DAB, DVB-T or 4G impose strong requirements to limit the negative effects on modulated signals of distortion or bad synchronization between emitter and receiver in digital channels. Distortion is mainly due to the nonlinear behavior of the output stage of the emitterpsilas power amplifier, in the form of saturation or memory effects. In order for these effects to be mitigated, a correction can be applied to input signals, causing them a distortion contrary to that occurring in the amplifier. In a previous paper, it has been demonstrated that segmented predistortion is an efficient solution to this problem in the case of gap-fillers for DVB-T. This paper presents the FPGA implementation of the segmented predistortion method. The suitability of currently available configurable devices for this kind of applications is discussed, and demonstrated by experimental results obtained in a real platform.