Designing one high performance signal generator based on triple tuned algorithm

Author

Wang, Wenqin

Author_Institution

Inst. of Electron., Chinese Acad. of Sci., Beijing, China

Volume

5

fYear

2005

fDate

4-7 Dec. 2005

Abstract

In this paper, the triple tuned algorithm which can be used to achieve high frequency resolution and low spurious level PLL synthesizer was discussed. By using this algorithm with some modification have been made, a low spurious level and high frequency resolution signal generator without degradation of frequency switching speed was developed by one direct digital frequency synthesizer chip AD9850. Experimental results show that the signal generator developed in this paper has low spurious level and phase noise level while its frequency resolution is high.

Keywords

digital integrated circuits; direct digital synthesis; phase locked loops; phase noise; signal generators; AD9850 frequency synthesizer chip; PLL synthesizers; direct digital frequency synthesizer chip; high frequency resolution; low phase noise level; low spurious level; signal generators; triple tuned algorithm; Algorithm design and analysis; Bandwidth; Frequency conversion; Frequency synthesizers; Phase locked loops; Phase noise; Signal design; Signal generators; Signal resolution; Tuning;

fLanguage

English

Publisher

ieee

Conference_Titel

Microwave Conference Proceedings, 2005. APMC 2005. Asia-Pacific Conference Proceedings

Print_ISBN

0-7803-9433-X

Type

conf

DOI

10.1109/APMC.2005.1607031

Filename

1607031