Load Current Funneling Examination for Power Distribution in High Performance Multi-Core Silicon Devices

Powering silicon devices today is challenging due to the increasing concentration of current into the load at the silicon. As multi-core processing becomes more available larger numbers of computational units are placed on a single piece of silicon allowing more processing and higher bandwidth in our computer systems. However, as the devices become smaller, the current density also increases which raises some fundamental questions on the impacts at the interconnect level and the performance of the power distribution network in general. This paper discusses the issue of current funneling into high density devices particularly around the advent of multi-core processing and discusses some of the issues and effects one may see as the technology moves forward into the future.