Title :
Stacked BSCR ESD protection for 250V tolerant circuits
Author :
Vashchenko, V.A. ; Concannon, A. ; Beek, M. Ter ; Hopper, P.
Author_Institution :
Nat. Semicond. Corp., Santa Clara, CA, USA
Abstract :
A device level solution for on-chip ESD protection for high-voltage applications is reported. Using technology CAD, a new stacked bipolar-triggered SCR device architecture is proposed and further validated by experimental measurements in a 250 V complementary BJT process.
Keywords :
avalanche breakdown; electrostatic discharge; power bipolar transistors; technology CAD (electronics); thyristors; 250 V; TCAD; avalanche breakdown; complementary BJT process; high-voltage tolerant circuits; on-chip ESD protection; stacked BSCR ESD; stacked bipolar-triggered SCR devices; Avalanche breakdown; Electrostatic discharges; Power bipolar transistors; Thyristors;
Conference_Titel :
Power Semiconductor Devices and ICs, 2004. Proceedings. ISPSD '04. The 16th International Symposium on
Print_ISBN :
4-88686-060-5
DOI :
10.1109/ISPSD.2004.1332906