Title :
Impact of the pattern layout on radio-frequency performance of thin-film SOI power MOSFETs
Author :
Matsumoto, Satoshi ; Mino, Masato
Author_Institution :
NTT Energy & Environ. Syst. Labs., Atugi-Shi, Japan
Abstract :
This paper describes guidelines for designing thin-film SOI power MOSFETs for linear-amplification applications. The linear-amplification characteristics and DC performance depend on the grand interconnection pattern. We prefer to put the grand pattern on the drain (output) side. There are optimum finger lengths which provide the best linear amplification characteristics. Finger length also depends on the operating frequency and total gate width.
Keywords :
interconnections; power MOSFET; silicon-on-insulator; thin film transistors; MOSFET RF performance; drain side pattern; finger length optimization; gate width; grand interconnection pattern; linear-amplification; power MOSFET pattern layout effects; thin-film SOI power MOSFET; Power MOSFETs; Silicon on insulator technology; Thin film transistors;
Conference_Titel :
Power Semiconductor Devices and ICs, 2004. Proceedings. ISPSD '04. The 16th International Symposium on
Print_ISBN :
4-88686-060-5
DOI :
10.1109/ISPSD.2004.1332911
