DocumentCode
3416950
Title
MCM-L substrates fabricated using patterned TLPS conductive composites
Author
Matijasevic, Goran ; Gallagher, Catherine ; Gandhi, Pradeep ; Pommer, Dick ; Kumar, Raj
Author_Institution
Toranaga Technol. Inc., Carlsbad, CA, USA
fYear
1997
fDate
2-4 Apr 1997
Firstpage
64
Lastpage
69
Abstract
MCM-L substrates are continually increasing in complexity and density requiring finer dimensions. Two layer requirements can be met by circuit pairs made of a high performance organic material with predrilled and plated vias and a pair of copper layers for defining circuitry. Lines and spaces of less than 50 μm with vias of 25 μm can be achieved with this material; however, lamination of several of these two-layer circuits to achieve multilayer constructions requires an innovative approach to vertical interconnect in order to achieve the high density required. The one strategy undertaken in this research to use an appropriate dielectric bond-ply and patterned conductive materials. The conductor material is an organic-metallic (Ormet*) composite. The material is based on transient liquid phase sintering (TLPS) and is used to make a connection between the two pads by alloying with the pad metallization. The alloyed metallurgical web formed provides a reliable network for electrical conduction. The results of fabrication and testing of high density multilayer MCM-L substrates using lamination of high performance circuit pairs are presented. Several types of multilayer structures composed of circuit layer pairs and via interconnect layers have been built. Examples of these structures are presented. Good electrical connection has been achieved by vertically interconnecting pads as small as 100 μm throughout the structure. Initial reliability testing demonstrates the high integrity of these structures
Keywords
composite materials; conducting materials; multichip modules; sintering; substrates; MCM-L substrate; Ormet; TLPS conductive composite; alloyed metallurgical web; conductor material; copper layer; dielectric bond-ply; fabrication; high density package; lines and space pattern; multilayer co-lamination; organic-metallic composite; pad metallization; predrilled plated via; reliability; transient liquid phase sintering; two-layer circuit; vertical interconnect; Bonding; Building materials; Circuit testing; Conducting materials; Copper; Dielectric materials; Integrated circuit interconnections; Lamination; Nonhomogeneous media; Organic materials;
fLanguage
English
Publisher
ieee
Conference_Titel
Multichip Modules, 1997., International Conference on
Conference_Location
Denver, CO
Print_ISBN
0-7803-3787-5
Type
conf
DOI
10.1109/ICMCM.1997.581149
Filename
581149
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