Phase noise cancellation for a Σ-Δ fractional-N PLL employing a sample-and-hold element

A phase noise cancellation technique is proposed to relax the fundamental tradeoff between phase noise and bandwidth in sigma-delta (Σ-Δ) fractional-N phase-locked loop (PLL) with phase interpolation. This technique employs a sample-and-hold element to suppress the noise arising from the wide compensation current pulses. The simulation result shows that the proposed topology can greatly reduce close-in phase noise and eliminate the spur problems.