DocumentCode :
3417756
Title :
7 to 30V state-of-art power device implementation in 0.25 μm LBC7 BiCMOS-DMOS process technology
Author :
Pendharkar, Sameer ; Pan, Robert ; Tamura, Takehito ; Todd, Bob ; Efland, Taylor
Author_Institution :
Texas Instrum. Inc., Dallas, TX, USA
fYear :
2004
fDate :
24-27 May 2004
Firstpage :
419
Lastpage :
422
Abstract :
The performance of low-to-medium voltage power devices (7 V-30 V) implemented in an advanced 0.25 μm BiCMOS-DMOS process is presented. The devices were optimized for a range of applications in this voltage group. In particular, the lateral DMOS devices have a capability of operating with the drain fully isolated from the substrate. The Rsp-BVdss performance for these devices is shown to be very competitive with respect to similar technologies. This performance is achieved without sacrificing the requirements for square electrical and lifetime safe operating area (SOA).
Keywords :
BiCMOS integrated circuits; power MOSFET; power semiconductor diodes; 0.25 micron; 7 to 30 V; LBC7 BiCMOS-DMOS process technology; SOA; high voltage isolated diode; lateral DMOS devices; lifetime safe operating area; low-to-medium voltage power devices; square electrical operating area; substrate isolated drain; BiCMOS integrated circuits; Power MOSFETs; Power semiconductor diodes;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Power Semiconductor Devices and ICs, 2004. Proceedings. ISPSD '04. The 16th International Symposium on
Print_ISBN :
4-88686-060-5
Type :
conf
DOI :
10.1109/ISPSD.2004.1332964
Filename :
1332964
Link To Document :
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