Specification and design of a quasi-delay-insensitive Java card microprocessor

This paper proposes a very robust microprocessor for Java Card based on asynchronous technology. Data dependency graphs are used to specify the microoperations of instructions of Java Card and then mapped to our quasi-delay-insensitive components. Three optimization schemes are proposed for better performance, less power consumption and/or less logic. Our goal is to design a simple, robust Java Card microprocessor