Title :
A 25-MHz bandwidth, 37-dB gain range CMOS Programmable Gain Amplifier with DC-Offset cancellation and driver buffer
Author :
Bing-Qiao Liu ; Bao-Yong Chi
Author_Institution :
Inst. of Microelectron., Tsinghua Univ., Beijing, China
fDate :
Oct. 29 2012-Nov. 1 2012
Abstract :
A CMOS Programmable Gain Amplifier (PGA) with a 3-dB bandwidth of higher than 25MHz and a gain range of 37 dB is presented. Its core consists of two gain stages and a buffer stage. Voltage gain is programmable by adjusting the feedback resistance of the resistor-feedback amplifier where a power-scable operational amplifier is embeded. The PGA has a voltage gain range from 0 to 36 dB with 1dB step. Integrated with this PGA is a DC-Offset cancellation and driver buffer. The circuit has been implemented in 65 nm CMOS. The overall PGA draws a maximum 4.3mA and minimum 1.3mA current from a 1.2V power supply.
Keywords :
CMOS analogue integrated circuits; buffer circuits; driver circuits; feedback amplifiers; programmable circuits; resistors; CMOS programmable gain amplifier; DC-offset cancellation; PGA; bandwidth 25 MHz; buffer stage; current 1.3 mA; current 4.3 mA; driver buffer; feedback resistance; gain 0 dB to 36 dB; gain 37 dB; gain stage; power-scable operational amplifier; resistor-feedback amplifier; size 65 nm; voltage 1.2 V; voltage gain; Bandwidth; CMOS integrated circuits; Electronics packaging; Gain; Receivers; Resistors; Semiconductor optical amplifiers; DC-offset Cancellation; IQ-calibration; Programmable gain amplifier;
Conference_Titel :
Solid-State and Integrated Circuit Technology (ICSICT), 2012 IEEE 11th International Conference on
Conference_Location :
Xi´an
Print_ISBN :
978-1-4673-2474-8
DOI :
10.1109/ICSICT.2012.6467727