DocumentCode
3418010
Title
Testing flash memories
Author
Mohammad, Mohammad Gh ; Saluja, Kewal K. ; Yap, Alex
Author_Institution
Dept. of Electr. & Comput. Eng., Wisconsin Univ., Madison, WI, USA
fYear
2000
fDate
2000
Firstpage
406
Lastpage
411
Abstract
Flash memories can undergo three different types of disturbances, DC-programming, DC-erasure, and drain disturbance. These faults are specific to flash memories and do not occur in RAMs. In this paper, we discuss these disturbances, their causes, and develop fault models that capture the characteristics of these faults. We present optimal and near optimal algorithms to detect these faults in flash memories
Keywords
automatic testing; fault diagnosis; flash memories; integrated circuit testing; DC erasure disturbance; DC programming disturbance; drain disturbance; fault detection; fault models; flash memory testing; near optimal test algorithms; optimal test algorithms; Decoding; EPROM; Fault detection; Flash memory; Nonvolatile memory; Optimal control; Random access memory; Solid state circuits; Testing; Tunneling;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design, 2000. Thirteenth International Conference on
Conference_Location
Calcutta
ISSN
1063-9667
Print_ISBN
0-7695-0487-6
Type
conf
DOI
10.1109/ICVD.2000.812641
Filename
812641
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