A framework for cost vs. performance tradeoffs in the design of digital signal processor cores

The TI T320C27XX DSP core is primarily targeted at the high-end control market, a typical application being the hard-disk drive. Different end-equipment segments in such a market demand varying requirements for cost and performance of the processor core. This forces certain customization in our design and design methodology to satisfy these varying requirements. A capability to perform quick cost versus performance tradeoffs in a design flow becomes imperative. This paper presents the framework used to meet this range of design requirements by controlling and constraining certain parameters that influence the cost and performance of a design