Title :
A framework for cost vs. performance tradeoffs in the design of digital signal processor cores
Author :
Madathil, Karthikeyan ; Rao, Jagdish C. ; Chander, Subash ; Menon, Amitabh ; Gautam, Avinash K. ; Brahme, Amit M. ; Udayakumar, H.
Author_Institution :
DSP Design, Texas Instrum. India, India
Abstract :
The TI T320C27XX DSP core is primarily targeted at the high-end control market, a typical application being the hard-disk drive. Different end-equipment segments in such a market demand varying requirements for cost and performance of the processor core. This forces certain customization in our design and design methodology to satisfy these varying requirements. A capability to perform quick cost versus performance tradeoffs in a design flow becomes imperative. This paper presents the framework used to meet this range of design requirements by controlling and constraining certain parameters that influence the cost and performance of a design
Keywords :
VLSI; circuit CAD; digital signal processing chips; embedded systems; integrated circuit design; logic CAD; DSP core design; TI T320C27XX DSP core; cost vs. performance tradeoffs; design methodology; design requirements; digital signal processor cores; Circuit testing; Costs; Design methodology; Design optimization; Digital signal processing; Digital signal processors; Instruments; Production; Reduced instruction set computing; Signal design;
Conference_Titel :
VLSI Design, 2000. Thirteenth International Conference on
Conference_Location :
Calcutta
Print_ISBN :
0-7695-0487-6
DOI :
10.1109/ICVD.2000.812651
