Simulated annealing of binary fields using an optoelectronic circuit

Author

Dupret, Antoine ; Rodier, Jean-Clalude ; Prevost, Donald ; Belhaire, E. ; Lalanne, Philipe ; Chavel, Pierre ; Garda, Patrick

Author_Institution

Inst. d´´Electron. Fondamentale, Univ. de Paris-Sud, Orsay, France

fYear

1996

fDate

12-14 Feb 1996

Firstpage

131

Lastpage

137

Abstract

A new approach to the VLSI implementation of stochastic cellular networks is demonstrated. Arrays of high throughput Gaussian noise sources are obtained thanks to the transduction of random patterns imaged onto an opto-electronic analog-digital circuit. A 4×4 cells prototype chip was implemented in a 1 μm CMOS technology. It was successfully tested and operated at 100 kHz. This led us to the design of a 24×24 prototype

Keywords

CMOS integrated circuits; Gaussian noise; VLSI; cellular arrays; cellular neural nets; integrated optoelectronics; mixed analogue-digital integrated circuits; neural chips; simulated annealing; speckle; 1 micron; 100 kHz; CMOS technology; VLSI implementation; analog-digital circuit; binary fields; high throughput Gaussian noise sources; optoelectronic circuit; prototype chip; simulated annealing; stochastic cellular networks; Analog-digital conversion; CMOS technology; Circuit simulation; Gaussian noise; Land mobile radio cellular systems; Prototypes; Simulated annealing; Stochastic resonance; Throughput; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Microelectronics for Neural Networks, 1996., Proceedings of Fifth International Conference on

Conference_Location

Lausanne

ISSN

1086-1947

Print_ISBN

0-8186-7373-7

Type

conf

DOI

10.1109/MNNFS.1996.493783

Filename

493783