DocumentCode :
3418612
Title :
A mixed-signal BIST scheme with time-division multiplexing (TDM) comparator and counters
Author :
Roh, Jeongjin ; Abraham, Jacob A.
Author_Institution :
Comput. Eng. Res. Center, Texas Univ., Austin, TX, USA
fYear :
2000
fDate :
2000
Firstpage :
572
Lastpage :
577
Abstract :
A low-cost and efficient built-in self-test (BIST) scheme is proposed for analog and mixed-signal circuits. We implement the time-division multiplexing (TDM) comparator to analyze the response of a circuit under test (CUT) with minimum hardware overhead. The comparator converts the response to a sequence of ones and zeros by comparing the response to the reference voltages at each time slot using time-division multiplexing. Simple counters are connected to the comparator to accumulate the ones generated at each time slot and used as a signature analyzer. This TDM comparator can be used to monitor internal nodes in addition to the classical primary output nodes to improve circuit testability. Simulation results are presented to illustrate the effectiveness of this scheme
Keywords :
analogue integrated circuits; automatic testing; built-in self test; comparators (circuits); counting circuits; integrated circuit testing; mixed analogue-digital integrated circuits; time division multiplexing; TDM comparator; analog circuits; built-in self-test scheme; counters; internal nodes monitoring; low-cost BIST scheme; mixed-signal BIST scheme; mixed-signal circuits; signature analyzer; time-division multiplexing; Analog circuits; Built-in self-test; Circuit faults; Circuit testing; Counting circuits; Jacobian matrices; Logic; Operational amplifiers; Pulse circuits; Time division multiplexing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, 2000. Thirteenth International Conference on
Conference_Location :
Calcutta
ISSN :
1063-9667
Print_ISBN :
0-7695-0487-6
Type :
conf
DOI :
10.1109/ICVD.2000.812669
Filename :
812669
Link To Document :
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