Suppression of V/sub th/ fluctuation by minimizing transient enhanced diffusion for deep sub-quarter micron MOSFET

It is revealed that the threshold voltage (V/sub th/) fluctuation in deep sub-quarter micron nMOSFETs is due more to variation of channel impurity concentration than to variation of gate length or oxide thickness. This is because the transient enhanced diffusion (TED) of the channel impurity becomes significant when the concentration of the interstitial Si atoms increases as gate length decrease. A rapid thermal annealing process, which minimizes the TED, is very effective in suppressing the V/sub th/ fluctuation.