DocumentCode :
3419342
Title :
60 GHz low noise amplifiers with 1 kV CDM protection in 40 nm LP CMOS
Author :
Raczkowski, Kuba ; Thijs, Steven ; Tseng, Jen-Chou ; Chang, Tzu-Heng ; Song, Ming-Hsiang ; Linten, Dimitri ; Nauwelaers, Bart ; Wambacq, Piet
Author_Institution :
Imec, Heverlee, Belgium
fYear :
2012
fDate :
16-18 Jan. 2012
Firstpage :
9
Lastpage :
12
Abstract :
This paper describes a set of miniature, three-stage 60 GHz LNAs designed in 40 nm LP CMOS. The designs prove effectiveness and ease of use of inductor-based ESD protection schemes applied to mm-wave circuits. The measured ESD protection levels reach 4.5 kV HBM, up to 7.6 A for VFTLP tests and a record of 1 kV CDM. At the same time, the NF of the LNAs is below 8 dB and the gain above 15 dB at 60 GHz, all at 1.1 V supply. These circuits can effectively be used as input stages of a phased array receiver.
Keywords :
CMOS analogue integrated circuits; electrostatic discharge; inductors; low noise amplifiers; millimetre wave amplifiers; CDM protection; LNA; LP CMOS; VFTLP tests; current 7.6 A; frequency 60 GHz; gain 15 dB; inductor-based ESD protection schemes; low noise amplifiers; mm-wave circuits; phased array receiver; size 40 nm; voltage 1 V; voltage 1 kV; voltage 4.5 kV; CMOS integrated circuits; Electrostatic discharges; Inductors; Logic gates; Noise; Radio frequency; Transistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Silicon Monolithic Integrated Circuits in RF Systems (SiRF), 2012 IEEE 12th Topical Meeting on
Conference_Location :
Santa Clara, CA
Print_ISBN :
978-1-4577-1317-0
Type :
conf
DOI :
10.1109/SiRF.2012.6160126
Filename :
6160126
Link To Document :
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