DocumentCode
3419485
Title
Evaluation of transient fault susceptibility in microprocessor systems
Author
Gawkowski, P. ; Sosnowski, J.
Author_Institution
Inst. of Comput. Sci., Warsaw Univ. of Technol., Poland
fYear
2004
fDate
31 Aug.-3 Sept. 2004
Firstpage
432
Lastpage
439
Abstract
The paper addresses the problem of evaluating transient fault impact on COTS microprocessor systems. We present the problem of fault effect propagation from low logical to software and application levels. Such an analysis is needed to optimize error detection and correction mechanisms at hardware and software levels. For this purpose we use sophisticated fault injectors. The usefulness of the presented approach was proved in many experiments described in the paper. It may support hardware/software co-design.
Keywords
error correction; error detection; fault simulation; hardware-software codesign; microprocessor chips; COTS microprocessor systems; error correction; error detection; fault effect propagation; fault injectors; hardware levels; hardware-software codesign; software levels; transient fault susceptibility; Digital systems; Microprocessors;
fLanguage
English
Publisher
ieee
Conference_Titel
Digital System Design, 2004. DSD 2004. Euromicro Symposium on
Print_ISBN
0-7695-2203-3
Type
conf
DOI
10.1109/DSD.2004.1333307
Filename
1333307
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