DocumentCode
3419728
Title
Fast reconfigurable hardware for the m-ary modular exponentiation
Author
de Macedo Mourelle, Luiza ; Nedjah, Nadia
Author_Institution
Dept. of Syst. Eng. & Comput., State Univ. of Rio de Janeiro, Brazil
fYear
2004
fDate
31 Aug.-3 Sept. 2004
Firstpage
516
Lastpage
523
Abstract
Modular exponentiation is a cornerstone operation to several public-key cryptosystems. It is performed using successive modular multiplications. This operation is time consuming for large operands, which is always the case in cryptography. For software or hardware fast cryptosystems, one needs thus to reduce the total number of modular multiplication required. Existing methods attempt to reduce this number by partitioning the exponent in constant or variable size windows. In this paper, we propose a fast and compact reconfigurable hardware for computing modular exponentiation using the m-ary method. The cryptographic hardware is low-cost and concise and therefore can be embedded in almost all electronic devices that use encrypted data.
Keywords
digital arithmetic; multiplying circuits; public key cryptography; reconfigurable architectures; cryptographic hardware; electronic devices; encrypted data; fast cryptosystems; fast reconfigurable hardware; m-ary modular exponentiation; modular multiplication; public-key cryptosystems; Algorithm design and analysis; Digital systems; Elliptic curve cryptography; Elliptic curves; Hardware; Iterative algorithms; Iterative methods; Partitioning algorithms; Public key cryptography; Systems engineering and theory;
fLanguage
English
Publisher
ieee
Conference_Titel
Digital System Design, 2004. DSD 2004. Euromicro Symposium on
Print_ISBN
0-7695-2203-3
Type
conf
DOI
10.1109/DSD.2004.1333320
Filename
1333320
Link To Document