DocumentCode :
3420261
Title :
Design of a low-cost and high-speed neurocomputer system
Author :
Avellana, Narcís ; Strey, Alfred ; Holgado, R. ; Fernandes, Joana A. ; Capillas, Ramon ; Valderrama, E.
Author_Institution :
Ulm Univ., Germany
fYear :
1996
fDate :
12-14 Feb 1996
Firstpage :
221
Lastpage :
226
Abstract :
This paper presents a new parallel computer architecture for high-speed emulation of any neural network model. The system is based on a new ASIC (Application Specific Integrated Circuit) that performs all required arithmetical operations. The essential feature of this ASIC is its ability to adapt the internal parallelism dynamically to the data precision for achieving an optimal utilization of the available hardware resources. Four ASICs are installed on one board of the neurocomputer system and emulate in parallel a neural network in a synchronous operation mode (SIMD architecture). By additional boards the system performance and also the size of the neural networks that can be simulated is increased. The main advantage of the system architecture is the simplicity of the design allowing the construction of low cost neurocomputer systems with a high performance. The achieved performance depends on the data precision, and the number of installed boards. In the case of 16 bit weights and only one board a performance of 480 MCPs and 120 MCUPs (using backpropagation) can be obtained
Keywords :
application specific integrated circuits; backpropagation; digital arithmetic; neural nets; parallel architectures; performance evaluation; 16 bit; ASIC; SIMD architecture; backpropagation; data precision; hardware resources; installed boards; internal parallelism; neural network emulation; neurocomputer system; parallel computer architecture; synchronous operation mode; Application software; Application specific integrated circuits; Computer architecture; Computer networks; Costs; Emulation; Gold; Neural network hardware; Neural networks; System performance;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronics for Neural Networks, 1996., Proceedings of Fifth International Conference on
Conference_Location :
Lausanne
ISSN :
1086-1947
Print_ISBN :
0-8186-7373-7
Type :
conf
DOI :
10.1109/MNNFS.1996.493794
Filename :
493794
Link To Document :
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