DocumentCode :
3420419
Title :
Direct synthesis of neural networks
Author :
Beiu, Valeriu ; Taylor, John G.
Author_Institution :
Dept. of Math., King´´s Coll., London, UK
fYear :
1996
fDate :
12-14 Feb 1996
Firstpage :
257
Lastpage :
264
Abstract :
The paper overviews recent developments of a VLSI-friendly, constructive algorithm as well as detailing two extensions. The problem is to construct a neural network when m examples of n inputs are given (classification problem). The two extensions discussed are: (i) the use of analog comparators; and (ii) digital as well as analog solution to XOR-like problems. For a simple example (the two-spirals), we are able to show that the algorithm does a very “efficient” encoding of a given problem into the neural network it “builds”-when compared to the entropy of the given problem and to other learning algorithms. We are also able to estimate the number of bits needed to solve any classification problem for the general case. Being interested in the VLSI implementation of such networks, the optimum criteria are not only the classical size and depth, but also the connectivity and the number of bits for representing the weights-as such measures are closer estimates of the area and lead to better approximations of the AT2
Keywords :
VLSI; entropy; mixed analogue-digital integrated circuits; neural chips; pattern classification; VLSI; XOR-like problems; classification problem; connectivity; constructive algorithm; direct synthesis; entropy; neural networks; Area measurement; Educational institutions; Encoding; Entropy; Mathematics; Network synthesis; Neural networks; Neurons; Size measurement; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronics for Neural Networks, 1996., Proceedings of Fifth International Conference on
Conference_Location :
Lausanne
ISSN :
1086-1947
Print_ISBN :
0-8186-7373-7
Type :
conf
DOI :
10.1109/MNNFS.1996.493800
Filename :
493800
Link To Document :
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