TLM 2.0 simple sockets synthesis to RTL

Convenience sockets are a family of derived sockets provided in utilities namespace of TLM 2.0 library which add additional functionalities to TLM 2.0 sockets. As one of the goals of high level modeling is to part communication from computation, synthesizing communication mechanisms including sockets can be a primary step to synthesize each TLM 2.0 design on RTL. Synthesizing sockets on RTL can provide the designer with the big picture of module´s functionality and communication requirements. In this paper, algorithms are proposed to map TLM 2.0 simple sockets down to RTL focusing on TLM 2.0 blocking and non-blocking transport interfaces. The algorithms get TLM 2.0 sockets as an input and generate an intermediate description of sockets in terms of ports. After that, RTL descriptions of the ports are generated using the standard generic payload packet as transaction type. The automation caused by synthesis algorithms in this paper can reduce the simulation speed and the designer´s effort.