DocumentCode
3420794
Title
Hardware Support for MPI in DIMMnet-2 Network Interface
Author
Tanabe, Noboru ; Kitamura, Akira ; Miyashiro, Tomotaka ; Miyabe, Yasuo ; Araki, Takeshi ; Luo, Zhengzhe ; Nakajo, Hironori ; Amano, Hideharu
Author_Institution
Toshiba
fYear
2006
fDate
Jan. 2006
Firstpage
73
Lastpage
82
Abstract
In this paper, hardware support for MPI on the DIMMnet-2 network interface plugged into a DDR DIMM slot is presented. This hardware support realize effective eager protocol and effective derived datatype communication of MPI. As a preliminary evaluation, the evaluation results on the real prototype concerning the bandwidth of elements constituting MPI are shown. IPUSH, which is remote indirect writing, showed almost the same performance as RDMA, which is remote direct writing. IPUSH can reduce memory space required for a receiver buffer sharply. The memory space reduction effect of IPUSH on a system with more nodes is higher. Compared with a method that starts the burst vector loading many times, VLS, which performs a regular-interval vector loading, sharply accelerated access to the data arranged at regular intervals. The above-mentioned results indicate that the improvement in the speed of MPI by the proposed method is promising
Keywords
message passing; network interfaces; storage management; DDR DIMM slot; DIMMnet-2 network interface; MPI hardware support; memory space reduction; Acceleration; Agriculture; Bandwidth; Degradation; Hardware; Network interfaces; Peer to peer computing; Protocols; Scalability; Writing;
fLanguage
English
Publisher
ieee
Conference_Titel
Innovative Architecture for Future Generation High Performance Processors and Systems, 2006. IWIA '06. International Workshop on
Conference_Location
Kohaha Coast, HI
ISSN
1537-3223
Print_ISBN
0-7695-2689-6
Type
conf
DOI
10.1109/IWIAS.2006.26
Filename
4089358
Link To Document