DocumentCode
3421279
Title
Design of ternary adiabatic Domino multiplier
Author
Peng-Jun Wang ; Qian-Kun Yang ; Xue-Song Zheng
Author_Institution
Inst. of Circuits & Syst., Ningbo Univ., Ningbo, China
fYear
2012
fDate
Oct. 29 2012-Nov. 1 2012
Firstpage
1
Lastpage
3
Abstract
By researching the adiabatic Domino circuit and the multiplier, a novel design of low power ternary multiplier on switch-level is proposed. First, the switch-level structure of ternary multiplier´s product circuit and carry circuit are derived according to the switch-signal theory and the peculiarity of adiabatic Domino circuit. The design of the one bit adiabatic Domino multiplier unit and the four bits multiplier are obtained. Finally, the circuit is simulated by Spice tool and the results show that the logic function of the four bits adiabatic Domino multiplier is correct. The energy consumption of the four bits adiabatic Domino multiplier is 58% less than the conventional Domino counterpart.
Keywords
logic design; low-power electronics; multiplying circuits; Spice tool; adiabatic domino circuit; carry circuit; energy consumption; logic function; low power ternary multiplier; product circuit; switch-level structure; switch-signal theory; ternary adiabatic domino multiplier; word length 1 bit; word length 4 bit; Clocks; Energy consumption; Low voltage; Power demand; Switches; Switching circuits; Adiabatic logic; Domino circuit; Switch-signal theory; Ternary adder;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated Circuit Technology (ICSICT), 2012 IEEE 11th International Conference on
Conference_Location
Xi´an
Print_ISBN
978-1-4673-2474-8
Type
conf
DOI
10.1109/ICSICT.2012.6467890
Filename
6467890
Link To Document