DocumentCode
3421630
Title
Investigation of EEPROM memories reliability during endurance and retention tests
Author
Plantier, J. ; Aziza, H. ; Portal, J.M. ; Reliaud, C.
Author_Institution
CNRS, IMT Technopole Chateau Gombert, Marseille
fYear
2009
fDate
6-9 April 2009
Firstpage
241
Lastpage
246
Abstract
To ensure reliability of EEPROM devices, it is significant to monitor the evolution of the memory array threshold voltage (VT) distribution. In this work, impact of endurance and retention tests is evaluated on EEPROM VT distributions. To track accurately the evolution of the VT distribution, an innovative experimental plan is setup and experimental results are deeply analyzed.
Keywords
EPROM; integrated circuit reliability; integrated circuit testing; integrated memory circuits; logic testing; voltage distribution; EEPROM memories reliability; endurance test; memory array threshold voltage distribution; retention test; Data mining; EPROM; Monitoring; Nonvolatile memory; Performance evaluation; Phased arrays; Portals; Testing; Threshold voltage; Tunneling; EEPROM; Endurance-retention tests; oxide degradation; reliability;
fLanguage
English
Publisher
ieee
Conference_Titel
Design & Technology of Integrated Systems in Nanoscal Era, 2009. DTIS '09. 4th International Conference on
Conference_Location
Cairo
Print_ISBN
978-1-4244-4320-8
Electronic_ISBN
978-1-4244-4321-5
Type
conf
DOI
10.1109/DTIS.2009.4938063
Filename
4938063
Link To Document