A 3.4-mW 2.4-GHz frequency synthesizer in 0.18 µm CMOS

Author

Carmo, J.P. ; Mendes, P.M. ; Couto, C. ; Correia, J.H.

Author_Institution

Dept. Ind. Electron., Univ. of Minho, Guimaraes

fYear

2009

fDate

6-9 April 2009

Firstpage

266

Lastpage

269

Abstract

This paper presents a low-power/low-voltage frequency synthesizer for the frequency of 2.4 GHz, which were designed and fabricated in a standard 0.18 mum CMOS process. This synthesizer is based on a phase-locked loop (PLL) with a integer divider in the feedback loop and for a voltage supply of only 1.8 V, it presents a total power consumption of 3.4 mW. The power consumptions for the voltage-controlled oscillator, phase-frequency difference/charge-pump and for the divider are 2 mW, 1 mW, 420 muW, respectively. The PLL is very fast, e.g., it takes only 1.6 mus to lock, which makes it a perfect companion for devices where frequency hops must be done very quickly.

Keywords

CMOS integrated circuits; frequency synthesizers; integrated circuit design; phase locked loops; voltage-controlled oscillators; CMOS process; PLL; complementary metal oxide semiconductor; feedback loop; frequency 2.4 GHz; frequency synthesizer design; integer divider; phase-locked loop; power 1 mW; power 2 mW; power 3.4 mW; power 420 muW; size 0.18 mum; time 1.6 mus; total power consumption; voltage 1.8 V; voltage-controlled oscillator; CMOS process; Charge pumps; Circuits; Energy consumption; Feedback loop; Frequency conversion; Frequency synthesizers; Phase frequency detector; Phase locked loops; Voltage-controlled oscillators; CMOS; PLL; wireless microsystems;

fLanguage

English

Publisher

ieee

Conference_Titel

Design & Technology of Integrated Systems in Nanoscal Era, 2009. DTIS '09. 4th International Conference on

Conference_Location

Cairo

Print_ISBN

978-1-4244-4320-8

Electronic_ISBN

978-1-4244-4321-5

Type

conf

DOI

10.1109/DTIS.2009.4938068

Filename

4938068