Special issues and methods for testing LNAs at high frequencies

Author

Carmo, J.P. ; Mendes, P.M. ; Couto, C. ; Correia, J.H.

Author_Institution

Dept. Ind. Electron., Univ. of Minho, Guimaraes

fYear

2009

fDate

6-9 April 2009

Firstpage

277

Lastpage

280

Abstract

This paper presents the design, optimization and methods for test a high frequency high gain low-noise amplifier (LNA), using a UMC RF 0.18 mum CMOS process. The LNA was designed to be part of a low-power/low-voltage RF CMOS transceiver, for operation in the 2.4 GHz ISM band. The LNA has a power consumption of 3.6 mW, for a power supply of only 1.8 V. The LNA has a control signal that makes it to sleep in the periods when the receiver operation is not needed. These features make the LNA suitable for wireless sensor networks applications, where the low-power is a major requirement.

Keywords

CMOS integrated circuits; circuit testing; low noise amplifiers; network synthesis; power consumption; radiofrequency integrated circuits; sensors; CMOS process; control signal; frequency 2.4 GHz; high frequency high gain low-noise amplifier; low power-low voltage RF CMOS transceiver; power 3.6 mW; power consumption; size 0.18 mum; testing LNA; voltage 1.8 V; wireless sensor network applications;

fLanguage

English

Publisher

ieee

Conference_Titel

Design & Technology of Integrated Systems in Nanoscal Era, 2009. DTIS '09. 4th International Conference on

Conference_Location

Cairo

Print_ISBN

978-1-4244-4320-8

Electronic_ISBN

978-1-4244-4321-5

Type

conf

DOI

10.1109/DTIS.2009.4938071

Filename

4938071