Title :
An MSB truncation scheme for low-power video processors
Author :
Moshnyaga, Vasily G.
Author_Institution :
Dept. of Electron. & Comput. Sci., Fukuoka Univ., Japan
Abstract :
A new circuit for reducing power consumption in video coding hardware is proposed. In contrast to existing techniques, our circuit minimizes the amount of signal transitions in processing elements by adaptively adjusting the number of the most significant bits to varying content of input data. According to simulations, the scheme shrinks signal transitions by as much as half without any impact on picture quality. The circuit is simple and easy to implement
Keywords :
digital signal processing chips; low-power electronics; video coding; MSB truncation scheme; low-power video processors; most significant bits; picture quality; power consumption; processing elements; signal transitions; video coding hardware; Batteries; Circuit simulation; Computer science; Energy consumption; Hardware; Motion estimation; Signal design; Signal processing; Switches; Video coding;
Conference_Titel :
Circuits and Systems, 1999. ISCAS '99. Proceedings of the 1999 IEEE International Symposium on
Conference_Location :
Orlando, FL
Print_ISBN :
0-7803-5471-0
DOI :
10.1109/ISCAS.1999.779999
