DocumentCode :
342202
Title :
Numerical sine and cosine synthesis using a complex multiplier
Author :
Palomaki, Kalle ; Niittylahti, Jarkko ; Renfors, Markku
Author_Institution :
Signal Process. Lab., Tampere Univ. of Technol., Finland
Volume :
4
fYear :
1999
fDate :
36342
Firstpage :
356
Abstract :
A 16 bit, all-digital synthesizer capable of generating sine and cosine waveforms simultaneously is presented. The synthesizer uses complex multiplication to synthesize the waveforms. An implementation of the signal generator was synthesized from an RTL-level VHDL-description for a 0.35 μm, 3.3 V, 4-metal, n-well CMOS-process. The maximum system clock frequency is 100 MHz and the design size is 14,700 gates. The estimated spurious free dynamic range is 82 dB
Keywords :
CMOS digital integrated circuits; CMOS integrated circuits; frequency multipliers; hardware description languages; waveform generators; 0.35 mum; 3.3 V; 82 dB; RTL; VHDL; complex multiplication; complex multiplier; cosine synthesis; cosine waveform; maximum system clock frequency; n-well CMOS-process; numerical sine synthesis; signal generator; sine waveform; spurious free dynamic range; Clocks; Dynamic range; Equations; Frequency; Laboratories; RF signals; Receivers; Signal generators; Signal synthesis; Synthesizers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1999. ISCAS '99. Proceedings of the 1999 IEEE International Symposium on
Conference_Location :
Orlando, FL
Print_ISBN :
0-7803-5471-0
Type :
conf
DOI :
10.1109/ISCAS.1999.780015
Filename :
780015
Link To Document :
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