The FAST architecture: a neural network with flexible adaptable-size topology

Author

Perez, A. ; Sanchez, Eduardo

Author_Institution

Logic Syst. Lab., Swiss Federal Inst. of Technol., Lausanne, Switzerland

fYear

1996

fDate

12-14 Feb 1996

Firstpage

337

Lastpage

340

Abstract

One of the central problems in the application of neural networks is finding the optimal network topology. This paper introduces the FAST architecture (flexible adaptable-size topology), an on-line, evolving neural network that dynamically adapts its topology through interactions with a problem-specific environment. We present a fully digital implementation of the network and demonstrate its viability on a pattern clustering task. We believe the FAST architecture holds potential by offering a fast, flexible platform for neural network applications

Keywords

field programmable gate arrays; network topology; neural net architecture; pattern recognition; FAST architecture; FPGA implementation; digital implementation; flexible adaptable-size topology; neural network; pattern clustering task; problem-specific environment; Clustering algorithms; Computer networks; Hardware; Learning systems; Logic; Network topology; Neural networks; Neurons; Pattern clustering; Subspace constraints;

fLanguage

English

Publisher

ieee

Conference_Titel

Microelectronics for Neural Networks, 1996., Proceedings of Fifth International Conference on

Conference_Location

Lausanne

ISSN

1086-1947

Print_ISBN

0-8186-7373-7

Type

conf

DOI

10.1109/MNNFS.1996.493812

Filename

493812