DocumentCode :
3422254
Title :
Performance implications of the PowerPC architecture´s hashed page table utilization in Windows NT
Author :
VandenBrink, M.
Author_Institution :
RISC Software, Motorola Inc., Austin, TX
fYear :
1997
fDate :
5-7 Feb 1997
Firstpage :
315
Lastpage :
320
Abstract :
Windows NTTM is a portable operating system, and as such has an abstracted view of the underlying processor architecture. One of the most processor-specific portions of an operating system is the management of virtual memory, and NT is no different in this respect. NT abstracts the processor-specific address translation mechanism and manages it as a translation lookaside buffer (TLB). This paper examines the performance ramifications of this abstraction when using the hashed page table (HTAB) on the PowerPCTM1 architecture
Keywords :
computer architecture; file organisation; operating systems (computers); performance evaluation; HTAB; PowerPC architecture; Windows NT; hashed page table; performance implications; portable operating system; virtual memory; Abstracts; Computer architecture; Hardware; Libraries; Memory management; Operating systems; Power system management; Random access memory; Software maintenance; Software performance;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Performance, Computing, and Communications Conference, 1997. IPCCC 1997., IEEE International
Conference_Location :
Phoenix, Tempe, AZ
Print_ISBN :
0-7803-3873-1
Type :
conf
DOI :
10.1109/PCCC.1997.581533
Filename :
581533
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=3422254
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