DocumentCode
342251
Title
Gain mismatch effect of cascaded sigma delta modulator reduced by serial technique
Author
Ho, Chian C. ; Kuo, Chung J.
Author_Institution
Dept. of Electr. Eng., Nat. Chung Cheng Univ., Chiayi, Taiwan
Volume
2
fYear
1999
fDate
36342
Firstpage
9
Abstract
Based on the MASH (multistage noise shaping) architecture, an improved architecture-uni-MASH which employs the time-division concept for architecture and circuit reuse is proposed. Uni-MASH retains robust stability and high-ordered noise shaping factor of MASH´s virtues. Besides, the following additional advantages of uni-MASH are verified by computer simulation: (1) Uni-MASH has smaller chip area than MASH. (2) Uni-MASH reduces the gain mismatch effects between each SDM stage
Keywords
VLSI; cascade networks; circuit stability; monolithic integrated circuits; sigma-delta modulation; MASH architecture modification; cascaded sigma delta modulator; chip area reduction; circuit reuse; gain mismatch effect reduction; high-ordered noise shaping factor; multistage noise shaping architecture; robust stability; serial technique; time-division concept; uni-MASH architecture; Circuits; Computer architecture; Delta modulation; Delta-sigma modulation; Multi-stage noise shaping; Noise cancellation; Noise shaping; Quantization; Switches; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1999. ISCAS '99. Proceedings of the 1999 IEEE International Symposium on
Conference_Location
Orlando, FL
Print_ISBN
0-7803-5471-0
Type
conf
DOI
10.1109/ISCAS.1999.780473
Filename
780473
Link To Document