Design and switched-capacitor implementation of a new cascade-of-resonators Σ-Δ converter configuration

Recently, the authors combined the hitherto cascade-of-integrators and cascade-of-resonators Σ-Δ converter configurations into a single cascade-of-resonators bandpass Σ-Δ converter. The salient features of the resulting bandpass Σ-Δ converter configuration is that it leads to the realization of complementary signal and noise transfer functions while permitting the automatic placement of the noise transfer function zeros at real frequencies (i.e. on the unit-circle in the discrete-time z domain). This Σ-Δ converter configuration consists of one single-bit quantizer and N second-order resonators (N second-order resonators and 1 integrator, respectively), leading to the realization of an even 2N-th (an odd (2N+1)-th, respectively) order bandpass Σ-Δ converter. This paper is concerned with an investigation and Monte-Carlo simulation of the proposed cascade-of-resonators bandpass Σ-Δ converter configuration satisfying a practical set of design specifications for a corresponding hardware implementation using the switched-capacitor technology