Thermo-mechanical reliability assessment for 3D through-Si stacking

The through silicon interconnection technology for stacked dies is a promising way of future package construction as it lowers yield risks of large die sizes and allows cost effective packaging solutions for heterogeneous electronic systems. Thermo-mechanical reliability dependent on processing and mounting steps as well as during testing are one major concern, which was addressed by FEA. The numerical investigations addressed single through-Si vias of different sizes and geometrical features, effects of multiple vias and those of mounting through-silicon stacked dies in plastic packages. It is shown that appropriate modeling requires the inclusion of multiple high temperature process steps as well as non-linear material properties for miniaturized materials used, realized by submodeling and sequential build-up techniques. A computational time consuming 40 steps calculation scheme was selected to include intrinsic stress from processing in the final package under thermal cyclic loading. Thin film elastic-plastic behavior of metals, in particular of the Cu-via, was accounted for as measured by nano-indentation while polymeric materials were treated viscoelastically based on tensile measurements of miniaturized specimens.