Title :
Householder bidiagonalization on parallel computers with dynamic ring architecture
Author :
Peng, Shietung ; Sedukhin, Stanislav ; Sedukhin, Igor
Author_Institution :
Aizu Univ., Japan
Abstract :
A parallel algorithm for Householder bidiagonalization on parallel computers with dynamic ring architecture is presented. The Householder bidiagonalization is the core for singular value decomposition (SVD) which has been found to be very useful as an analytical tool in the presence of roundoff error and inexact data. Two sided Householder reduction/expansion technique is applied for bidiagonalization. Innovative systolic like communication techniques are proposed which eliminate the need for computing explicitly the transpose of the matrix. The experimental study on the CM-5 shows that the parallel algorithm developed in the article achieves high speedup for large matrices
Keywords :
parallel algorithms; parallel architectures; parallel machines; singular value decomposition; CM-5; SVD; analytical tool; dynamic ring architecture; high speedup; householder bidiagonalization; inexact data; innovative systolic like communication techniques; large matrices; parallel algorithm; parallel computers; roundoff error; singular value decomposition; two sided Householder reduction/expansion technique; Computer applications; Computer architecture; Concurrent computing; Eigenvalues and eigenfunctions; Lakes; Parallel processing; Power engineering and energy; Power engineering computing; Research and development; Very large scale integration;
Conference_Titel :
Parallel Algorithms/Architecture Synthesis, 1997. Proceedings., Second Aizu International Symposium
Conference_Location :
Aizu-Wakamatsu
Print_ISBN :
0-8186-7870-4
DOI :
10.1109/AISPAS.1997.581657
