DocumentCode
342461
Title
Design of a 1.5 V CMOS integrated 3 GHz LNA
Author
Rafla, Ramez A. ; El-Gamal, Mourad N.
Author_Institution
Microelectron. & Comput. Syst. Lab., McGill Univ., Montreal, Que., Canada
Volume
2
fYear
1999
fDate
36342
Firstpage
440
Abstract
Two 1.5 V-supply LNAs were designed in a 0.35 μm CMOS process, for center frequencies of 2.5 and 3 GHz, with 2.5 and 3 dB noise figures respectively. The circuits use no off-chip components such as bonding wire inductances or biasing-tees, making them suitable for simple and robust integration. The forward transmission (S21) obtained was 22 and 18 dB for the 2.5 and 3 GHz LNAs respectively, at a relatively low power consumption of 12 mW, when excluding the output stages
Keywords
CMOS analogue integrated circuits; UHF amplifiers; integrated circuit design; integrated circuit noise; low-power electronics; 0.35 micron; 1.5 V; 12 mW; 2.5 GHz; 2.5 dB; 3 GHz; 3 dB; CMOS process; LNA; biasing-tees; bonding wire inductances; center frequencies; forward transmission; off-chip components; power consumption; Couplings; Impedance; Inductance; Inductors; Magnetic resonance; Noise figure; Noise measurement; Parasitic capacitance; Resonant frequency; Shunt (electrical);
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1999. ISCAS '99. Proceedings of the 1999 IEEE International Symposium on
Conference_Location
Orlando, FL
Print_ISBN
0-7803-5471-0
Type
conf
DOI
10.1109/ISCAS.1999.780759
Filename
780759
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