A 1-V CMOS log-domain integrator

Author

Python, Dominique ; Punzenberger, Manfred ; Enz, Christian

Author_Institution

Electron. Lab., Swiss Fed. Inst. of Technol., Lausanne, Switzerland

Volume

2

fYear

1999

fDate

36342

Firstpage

685

Abstract

A novel circuit implementation of a CMOS log-domain integrator is presented. Unlike most other implementations, it does not require placing of MOSFETs in separated wells, and therefore allows very compact filters, which are fully compatible with modern standard CMOS technologies. Besides the saving of chip area, this also helps to reduce parasitic capacitances. The most important advantage of this circuit is the very low minimum required supply voltage of only two saturation voltages plus one gate-to-source voltage of a weakly inverted MOSFET. This is fully compatible with the minimum required supply voltage of digital gates implemented in the same technology. The integrator was used as a building block for a 5th-order Bessel filter, which was simulated with the transistor parameters of a 0.5 μm CMOS technology

Keywords

Bessel functions; CMOS analogue integrated circuits; active filters; capacitance; integrating circuits; low-power electronics; 0.5 micron; 1 V; CMOS; fifth-order Bessel filter; gate-to-source voltage; log-domain integrator; minimum required supply voltage; parasitic capacitances; saturation voltages; transistor parameters; weakly inverted MOSFET; Analog circuits; CMOS technology; Capacitors; Circuit simulation; FETs; MOSFETs; Nonlinear filters; Parasitic capacitance; Signal processing; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1999. ISCAS '99. Proceedings of the 1999 IEEE International Symposium on

Conference_Location

Orlando, FL

Print_ISBN

0-7803-5471-0

Type

conf

DOI

10.1109/ISCAS.1999.780857

Filename

780857