Emitter size effects in high speed HBTs

Driven by advantageous physical properties, III-V semiconductors have been dominating the search for suitable high speed telecommunication systems. Integration of high speed III-V semiconductor devices into circuits and telecommunication systems requires miniaturization of the III-V devices and a comprehensive understanding of the size effects on the device performance. In this work we present the results of a systematic study of the emitter size effects of InAlAs/InGaAs Heterojunction Bipolar Transistors (HBTs) grown by molecular beam epitaxy (MBE), lattice matched to InP substrates. With the device dimensions reduced, size effects, surface recombination and carrier trapping effects dominate current transport over the conventional drift diffusion current transport mechanisms. Although, reduction of the emitter size in HBTs traditionally results in reduced current gain, our work shows that careful design of the HBT structure and processing derails allow the formation of small high speed devices with improved current gain characteristics. The improved performance of HBTs indicate that further increase in device density in high speed integrated circuits and systems is possible