• DocumentCode
    3425212
  • Title

    Design for board trace reliability of WLCSP under drop test

  • Author

    Tee, Tong Yan ; Ng, Hun Shen ; Syed, Ahmer ; Anderson, Rex ; Khoo, Choong Peng ; Rogers, Boyd

  • Author_Institution
    Amkor Technol., Inc., AZ
  • fYear
    2009
  • fDate
    26-29 April 2009
  • Firstpage
    1
  • Lastpage
    8
  • Abstract
    Through an aggressive product development program which includes experiment and simulation, Amkor has developed the next level of WLCSP (CSPnltrade), a product which exhibits superior board level reliability when subjected to drop impact, a strong requirement for portable electronics. Failure mechanism of WLCSP under drop test has been established. Depending on type of WLCSP and test board design, 3 primary failure modes can be observed, i.e. copper (Cu) board trace crack, Cu RDL (Redistribution Layer) vertical crack and Cu/UBM (Under Bump Metallization) delamination. CSPnl can exhibit distinct failure modes under different test board and/or CSPnl designs, resulting in a vast difference in drop test lifetimes. The primary failure mode is shifted whenever the weakest link is removed through design improvement. This paper will focus on detailed analysis of copper board trace crack under drop test, using an integrated approach of testing, failure analysis, material characterization and modeling. Board design guidelines are formulated to understand the effects of I/O position, board trace routing direction, board trace width, tear drop design, PCB pad size, stack-up thickness, and alloy materials on board trace reliability. Comparison is also made on possible impact on Cu RDL reliability.
  • Keywords
    chip scale packaging; cracks; failure analysis; impact (mechanical); printed circuit testing; printed circuits; wafer level packaging; Cu RDL reliability; WLCSP; board trace reliability; copper board trace crack; drop impact; drop test; failure analysis; failure mechanism; Copper; Delamination; Failure analysis; Guidelines; Life testing; Materials reliability; Materials testing; Metallization; Product development; Routing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Thermal, Mechanical and Multi-Physics simulation and Experiments in Microelectronics and Microsystems, 2009. EuroSimE 2009. 10th International Conference on
  • Conference_Location
    Delft
  • Print_ISBN
    978-1-4244-4160-0
  • Electronic_ISBN
    978-1-4244-4161-7
  • Type

    conf

  • DOI
    10.1109/ESIME.2009.4938518
  • Filename
    4938518