DocumentCode
3425615
Title
Level-wise Scheduling Algorithm for Fat Tree Interconnection Networks
Author
Ding, Zhu ; Hoare, Raymond R. ; Jones, Alex K. ; Melhem, Rami
fYear
2006
fDate
Nov. 2006
Firstpage
9
Lastpage
9
Abstract
This paper presents an efficient hardware architecture for scheduling connections on a fat-tree interconnection network for parallel computing systems. Our technique utilizes global routing information to select upward routing paths so that most conflicts can be resolved. Thus, more connections can be successfully scheduled compared with a local scheduler. As a result of applying our technique to two-level, three-level and four-level fat-tree interconnection networks of various sizes in the range of 64 to 4096 nodes, we observe that the improvement of schedulability ratio averages 30% compared with greedy or random local scheduling. Our technique is also scalable and shows increased benefits for large system sizes
Keywords
multiprocessor interconnection networks; scheduling; tree data structures; fat tree interconnection networks; greedy scheduling; hardware architecture; level-wise scheduling algorithm; parallel computing system; upward routing path; Bandwidth; Communication switching; Computer architecture; Hardware; Multiprocessor interconnection networks; Network topology; Processor scheduling; Routing; Scheduling algorithm; Switches;
fLanguage
English
Publisher
ieee
Conference_Titel
SC 2006 Conference, Proceedings of the ACM/IEEE
Conference_Location
Tampa, FL
Print_ISBN
0-7695-2700-0
Electronic_ISBN
0-7695-2700-0
Type
conf
DOI
10.1109/SC.2006.40
Filename
4090183
Link To Document