A novel function-level EHW architecture within modern FPGAs

Most research conducted in the evolvable hardware EHW area has been done at the gate level. In order to synthesize larger circuits, a level of abstraction is needed. Functional evolvable hardware, FEHW was introduced to meet the researcher´s need for more capable circuits than those that could be represented at the gate level. It was concluded that specialized FPGAs were desirable when implementing FEHW. A new architecture has been introduced that performs FEHW using commercially available FPGAs. This architecture describes an evolutionary system completely contained within a single FPGA